Electrical Engineering @ Georgia Tech (4.00 GPA). I design analog & mixed-signal silicon, build the test systems that prove it out, and right now I'm keeping a temperature-compensated oscillator stable to sub-ppm at Aura Semiconductor.
I grew up in Dubai building things — sixteen competition robots and a 3,000-member financial-literacy community — long before I called it engineering. That pull led me to EE at Georgia Tech, with research summers back in Ranchi.
Now I work where circuits meet measurement: at Aura I model how a crystal oscillator drifts with temperature and cancel it to sub-ppm with polynomial compensation and per-part calibration. From here I'm going deeper into the analog core — bandgap references, oscillator phase noise, transistor-level design — toward mixed-signal and physical design.
Automated the temperature-compensation methodology for a precision crystal oscillator — modeling count→ppm drift and cutting worst-case residual frequency error to sub-1 ppm. [Aura Semiconductor]
A precision crystal oscillator's frequency drifts with temperature — measured in parts-per-million. The fix is a feed-forward polynomial compensation driven by an on-chip temperature reading, with per-part calibration trimming what's left.
Re-implemented a legacy temperature-compensation methodology as an automated Python tool, reproducing reference results to three decimals across 11 PVT corners (−40 to +125 °C). Modeled count→ppm drift with a 5th-order fit and compared 1-point vs 2-point calibration.
Cut worst-case residual frequency error ~50× to sub-1 ppm, separated temperature-sensor corner variation from crystal manufacturing spread for independent error budgeting, and automated golden-die selection by post-calibration spread.
A current-starved ring oscillator hitting 450–550 MHz at <500 µW, carried through the full schematic-to-verified-layout flow.
A ring oscillator chains an odd number of inverting stages into a loop; starving each stage's current lets a control voltage tune the oscillation frequency — a core building block for clocks and PLLs.
Designed and sized the oscillator in the open-source SKY130 process with Cadence Virtuoso, hitting 450–550 MHz under 500 µW, then ran the complete flow: schematic, layout, Pegasus DRC/LVS, and post-layout simulation.
Closing the full schematic-to-verified-layout loop on a real analog block is the core skill of IC design — every number checked against silicon-accurate rules.
Piezoelectric plantar-pressure insoles with real-time LED feedback, validated with children in clinician-supervised trials.
Children with cerebral palsy benefit from real-time feedback on how they distribute weight while walking, but clinical gait tools are bulky and expensive.
Piezoelectric insoles mapping plantar pressure at the heel, arch, and ball, driving LEDs for instant visual feedback. Refined sensor placement, signal conditioning, and packaging to stay compact and wearable.
Founded and developed end to end. Validated across two iterations in clinician-supervised trials, built from off-the-shelf parts for a 30% cost reduction.